Develop Parallel Arithmetic Operations for Binary Modified Signed-Digit System Using Two-Step Algorithm

An optical computing system is expected to be a powerful information processing system that takes full advantage of optics, such as parallelism, high speed, and large information capacity. Therefore many suitable optical number systems have been developed by many research to exploit the inherent parallelism of optics to developed parallel arithmetic operations . In this paper we used binary modified signed-digit (BMSD) number system and available recoding method to generate a simplified binary MSD addition/subtraction truth table to obtained a parallel two-step algorithm in which the carry chain was generated during the addition operation and the borrowing chain was generated during the subtraction operation that will be stopped after two steps, the addition and subtraction operations will be completed independent of the number of digits in each operand. Also this paper involve limitation for the minterms that used in the logical processing for the addition/subtraction truth table.


Introduction :
Digital optical computing has stimulated a great deal of interest during the last two decades. The objective is to develop efficient computing algorithms and architectures that can exploit the inherent parallelism and 3-D massive no interfering interconnections of optics [4]. High-speed and parallel processing has been an attractive subject in computing science for along time. In Boolean logic-based electronic digital computers, binary addition is a key arithmetic operation. The addition algorithms however must have a carry propagation that will severely limit the calculating speed [5].
To avoid or limit the carry propagation and to reduce the memory size of contentaddressable memory (CAM), many of number systems have been developed such as , residue-number, redundant-binary (RB) number representation ,and modified signeddigit (MSD) number system [7].

Explicative idea for the number systems employed:
All number systems have their own advantages and limitations. Using a residue number system(RNS) , arithmetic operations such as addition, subtraction, and multiplication can be done without carries but the number and the size of the truth table increase greatly as the numerical range involved becomes large [1, 4,7] . The redundant signed-digit number system is another alternative number representation which generates limited-carry propagation arithmetic. In this number system parallel arithmetic operation are possible in a constant operation time and with few carry propagation steps but the information storage density of the number system is limited which often result in complex circuits [1]. The most widely investigated representation is the modified signed-digit (MSD) number system , in which the carry propagation can be confined in two adjacent digit position and thus addition or subtraction of arbitrary-length operands can be completed in definite steps . As a result, three step, two step, and single-step algorithms have been suggested [6].

Olden arithmetic approaches:
Mirsalehi and Gaylord had implemented MSD addition and subtraction methods using content-addressable memory (CAM) ,even though this method improves the speed of operation but it requires an increasingly more complex CAM hologram , for every single output bit the minterms need to be stored in fifty-six CAM holograms [2]. Li and Eichmann have introduced a two-step condition symbolic MSD operation where only up to twelve holograms are needed for each output bits [9]. The scheme was extended further by Cherri and Karim which introduce an additional input bit with each pair of input bits only up to nine reference hologram are needed for each output bit and only four bits are needed in this template where as the template in Li and Eichmann method requires to five bits [2].

Research objective:
In this paper we have to extend the scheme provided by Cherri and Karim by utilizing recoding method for the input number to convert it to an efficient MSD representation in order to limit the carry and barrow propagation in the addition and subtraction operations. Based on the recoding method we attempted to develop a truth table which can apply parallel addition / subtraction operations in two-steps algorithm and fewer number of minterms needed to be stored in CAM hologram.

5.The modified signed-digit (MSD) number system :
The MSD number representation allows parallel arithmetic operation with reduced number of carry propagation steps. It's referred to as a redundant number because more than one representation is possible for any number in this system.
For radix-2 MSD number system, a given decimal integer number D either positive or negative can be represented by an n-digit as in eq(1) : Where the Xi is a member of the set {1, 0, 1}, here 1 denotes (-1) .So the MSD negative number is the complement of the MSD positive number [1,5]. For example, number (9)10 has many binary MSD representation so, (01001), (11011), (01111), and (11001). These representations are given by applied encoding method based on truth table shown in table (1).

Basic concept of the recoding MSD method :
The redundant property of MSD number system can be used to simplify the MSD addition rules. Let x=xn-1 xn-2 ….x0 , be an n-digit MSD number, then when x is recoded according to the recoding method ,it produced an (n+1) digit MSD number z=zn zn-1 zn-2…z0, note that the MSD number x and the recoding number z are numerically equal . Furthermore the MSD digits of the recoded number z satisfy the condition (zi × zi-1 ≠ 1) [1, 3]. As shown in table (1), number (1)10 has two MSD representation (01) and (11) respectively, we can eliminate the representation (01) during the recoding operation and use (11) representation only .These operations will limit the appearance of consecutive (11) and (11) series from the recoded number (addend / augend) operand which can make the carry propagation during the addition operation [3] . Thus when number (9)10 is recoded according to this method it will take the MSD representation (11011) only. This representation was given by divided number (9)10 into rdiax-2 as shown in fig(1), then when the remainder is equal to 1 it will mape into (11) MSD representation, where bit 1 is called a sum and bit 1 is called a carry. Note that bit 1 will be shifted one step bellow. Also when the remainder is equal to 0 it will mape into (00). These sum and carry bits are summed to give the final recoding MSD representation number.

Binary MSD addition operation :
In the MSD addition operation , the number are first represented in MSD representation and then to-be-added pair of numbers will be mapped into another intermediate pair of numbers called primary transfer and weight digits in a way that the latter numbers when added , do not result in any carry . These transfer and weight are used to generate secondary set of transfer and weight digits , which in turn generate bits that are summed to give the final result , therefore the MSD addition operation requires four(three)steps to obtained the final carry-free addition [8]. Li and Eichmann combined the first two (three) steps by incorporating additional information from the less significant pair of bits, the resulting two-step algorithm [9]. This two-steps algorithm is much simpler by Cherri and Karim as shown in table (2-a). The examination of table (2-a) reveals that when two MSD bits numbers xi yi are summed the less significant bits xi-1 yi-1 must be examined to generate the transfer (T) and weight (W) bits respectively. Notice that when xi yi = (01) or (10) and the less significant bits are equal to the set, set1={11,01,10,00}, then we take (11) representation . If the less significant bits are equal to the set, set2 = {11,11,01,10, 11} we take (01) representation. Likewise, in the case of xi yi = (10) or (01) and the less significant bits xi-1 yi-1 are equal to set1, will take (01) representation, and if xi-1 yi-1 are equal to set2, will take (11) representation respectively [2]. From table (2-a) notice that, it have two halves. Each half consisting of three identical columns. Therefore, it is suitable to introduce a flag bit f ,which has a value either 1 or 0 to denote less significant pair of bits. This reduces

Binary MSD subtraction operation:
In a similar way the subtraction operation truth table can be introduce as shown in table (3-a). When two MSD number xi yi are subtracted to generate the primary Tand Wstep, first we must examine the less significant bits xi-1 yi-1. Table (3-a) reviles that when xi yi=01 or 10 and the less significant bits xi-1yi-1 are equal to the set, set3={00,10,01,11} then (11) representation must be taken. If the less significant bits xi-1 yi-1are equal to the set, set4={10,01,11,11,11}, then (01) representation must be taken.
Also the carry can be obtained when the pair of bits xi yi =01 or 10 and the less significant bits xi-1 yi-1 are equal to (11), then (11) representation must be taken. Otherwise (01) representation will be taken for all other cases of the less significant bits. This means incorporate all the sets of the less significant bits (set1 and set2) that appear in table (2-a) under one representation except the probability of (11) that will take another representation. Then, when applying the addition operation rules on the truth table (4-a) using summed two recoded MSD numbers to give the T + and W + digits, and then summed the T + and W + bits to generate the final result, we obtain fast and correct results as shown in the following example:. If we remove the examination of the less significant bits xi-1 yi-1 from table (4-a) and use (01) representation in the case of xi yi are equal to (10/01) numbers, also we use (01) representation in the case of xi yi are equal to (10/01) numbers. Then apply the addition rules on this table, we can note that, this change essentially has no effect on the final result. The reason is belong to the recoding method which not permit the series of bits (11) and (11) to appear in the recoded numbers. Based on this observation it is appropriate to reduce table (4-a) to introduce a new table shown in table (4-b). Note that table (4-b) consist of two input bits only for each output T + and W + bits. Instead of three input bits used in table

9-2. Binary MSD subtraction operation:
In the similar method, when two recoded MSD numbers xi yi are subtracted to generate the primary transfer Tand weight Wdigit step, the barrow is generated when xi yi =01 or 10 and the less significant bits xi+1 y i+1 are equal to (11), then we must take 11 representation to avoid this barrow. Otherwise, less significant bits will take 01 representation as shown in table (5-a) .This method denote to incorporate all the sets of the less significant bits (set3 and set4) which appear in table (3-a) under one representation except the probability of (11) will take another representation. Also the borrow is generated when xi yi =10 or 01 and the less significant bits are equal to 11, then will take 11 representation. Otherwise, the less significant bits will take (01) representation. This method incorporates all the sets of the less significant bits (set3 and set4) that appear in table (3-a) under one representation except the probability of (11) will take another representation. This means that we can give the complement of yi and yi-1 bits from table (4-a) to find the subtraction truth table (5-a). Then when we apply subtraction rules into the truth table (5-a) using subtract two recoded MSD number to give Tand Wdigits step and then summed the Tand Wbits to generate the final result we obtain a fast and correct result as shown in this example: If we remove the examination of the less significant bits xi-1 y i-1 from table (5a) and use (01) representation in the case where xi yi are equal to (10/01) numbers, also we use (01) representation in the case where xi yi are equal to (01/10) numbers. Then applying the subtraction rules on this table we can note that, this change essentially has no effect on the final result. The reason belongs to the recoding method which do not permit the series of bits (11) and (11)

The MSD logic processing :
The MSD logic processing is implemented using the content addressable memory (CAM). In a CAM the truth table inputs which produce the same output logic level are generally grouped together. Then the logical minimization process is applied to reduce the number of minterms (maxterms) in the sum of product (product of sum) expression.The reduced minterm or maxterms are stored in an optical memory [2].
In this paper we obtain a result for the reduced minterms for T + , W + , T -, W -, S + /D + , and S -/D -, as shown in table (7). This table produces either a 1 and 1 at the output. We can note that the T(W) function requires two (one) minterms for both addition and subtraction operation compared with table (6) which illustrated the reduce minterms for earlier method by chirre and karim that required three (two) minterms for T(W) function of the addition and subtraction tables. Furthermore, we eliminate the flag bit (F) which appear in table (6).

Conclusions and Recommendations:
The proposed method deals with binary MSD truth tables for the addition and subtraction operations which can be able to reduce these tables by using two inputs only for each table instead of three inputs in the work of chirre and karim. Also we eliminate the examination of the less significant bits that appear in the earlier tables. Further reduction of optical implementation was obtained by using few minterms to be stored in an optical memory. Finally, the parallelism inherent in the proposed arithmetic operations is well mapped to that of the optical system. This parallel algorithm offers a strong candidate for future applications in digital optical computing.